In the fabrication of semiconductor devices, increased density and speed has caused a shift in the metallization system from Al to Cu to reduce the resistance of the conductor. To reduce the capacitive coupling between adjacent metal lines, materials having low k dielectric constant are used to form dielectric layers between adjacent metal lines. Furthermore, to prevent diffusion of copper containing materials into the surrounding low k dielectric layers, barrier layers are forms between metal layers and dielectric layers.
However, it has been observed that between the copper planarization and the subsequent dielectric layer deposition, the copper material may be subjected to an oxidation reaction through exposure between processing chambers or processing tools. The exposure to an oxidizing environment results in the formation of surface oxides on the copper material. The oxides inhibit the adhesion of subsequent layers, for example, the dielectric layer, that are deposited thereover. Copper adhesion and electromigration resistance are extremely important properties affecting device yield and device lifetimes. Patents and patent applications in this technological field include U.S. Pat. Nos. 7,229,911 B2, 7,193,325 B2, 7,153,774 B2 and WO 01/08213 A1.
Accordingly, there is a need for an improved process for making a semiconductor device that includes copper interconnects. There is a need for such a process that reduces electromigration without significantly raising conductor resistance. The method of the present invention provides such a process.